This invention relates generally to electronic circuitry and more particularly to output buffers for digital integrated circuits.
Output buffers are used in digital integrated circuits (ICs) to drive an external load. Since the size of the load is not usually known, output buffers are designed to provide enough current to drive loads up to a maximum permissible level. This is typically accomplished by providing an output transistor large enough to drive the maximum permissible load or by providing a number of smaller transistors coupled in parallel to drive the maximum permissible load.
A problem is encountered when output buffers of the prior art are quickly turned on or off. Since the currents are so large, fast switching of the prior art buffers can cause transients such as noise spikes on the power, ground and data busses which can cause data errors, latch-up and other problems in the digital electronic circuitry. This problem can be reduced by a technique known as slew-rate control.
Slew rate is defined as the rate of output transition in volts per unit time as set forth below: ##EQU1## Conventional digital output buffers with slew-rate control use a number of parallel transistors which can be sequentially turned on to reduce the abruptness of the transition and thereby reduce the aforementioned transients. The parallel transistors of the buffers can be controlled by delay elements or by feedback from the output of the buffer.
The transistors of a digital output buffer can be arranged as a pull-up network which can pull-up the output of the buffer to about V.sub.dd and a pull-down network which can pull down the output of the buffer to about V.sub.ss. A problem encountered with slew-rate control is that as one of the networks of the buffer is being slowly turned on the other network of the buffer is being slowly turned off, resulting in a time when both networks are active simultaneously. This can allow a very large current known as a "crowbar" current to flow between V.sub.dd and V.sub.ss.
This problem has been addressed in U.S. Pat. No. 4,725,747 of Stein et al. and U.S. Pat. No. 4,771,195 of Stein. In the Stein et al. '747 patent, a CMOS output buffer has a pull-up transistor 12 and a pull-down transistor 14 which can be individually and sequentially activated for slew-rate control. Transistors 36 are provided to quickly turn the pull-up transistor 12 off and transistors 40 are provided to quickly turn the pull-down transistor 14 off to minimize crowbar current.
A problem encountered with the buffer of the Stein et al. '747 patent is that the transistors 36 and 40 are active devices which require an input signal IN to control their operation. The input signal IN is inverted by a transistor 38 to control pull-up transistor 12 and is inverted by a transistor 44 to control pull-down transistor 14. Unfortunately, this inversion requires that transistor 38 be of the opposite polarity of transistors 12 and 36 and thus must be formed in a separate well in the substrate than those transistors. Likewise, the inversion requires that transistor 44 is of the opposite polarity of transistors 14 and 40 and must be formed in a separate well in the substrate than those transistors. Since transistors 38 and 44 must be located separately from the transistors that they control, additional sets of interconnect lines are required to couple the transistors together, thereby increasing the complexity of the interconnect layer and the size of the circuit.